REDEFINE™ based solutions

Offer acceleration of safety critical applications on reconfigurable hardware to meet the requirements of Integrated Modular Avionics (IMA) and Full Authority Digital Engine Control (FADEC) in avionics.

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Accelerate compute-intensive data-parallel SIMD and task-parallel MIMD applications with optimal power usage, spanning applications from next generation health-care to smart appliances.

Accolades

In the current evolution of processors, specially in the embedded world, performance resides in parallel architecture. In this domain, the dynamic allocation of software within a matrix of cores is a very promising technology we have accompanied for years, because it was an elegant solution to solve many issues we face on a daily basis.

First of all the parallelization of software is done in a rigorous way by the compiler, splitting the code in independent entities, and this is a huge progress in engineering.

Second: the cores can be deactivated if proven in failure, and the software can be reallocated automatically, giving an elegant way to graceful degradation.

Third: the software can be sent several times in the matrix, and it gives intrinsic replication.

Fourth: the software being allocated at the very moment of execution, the software is very difficult to trap, and it increases the resilience to cyberattacks.

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"For Safran, this SoC, once available, will be a breakthrough in computer technology."

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Francois Neumann

VP, Scientific & Research Partnerships
Safran Electronics & Defense